Development of a resistance change type memory such as a ReRAM (Resistive RAM) or a PCRAM (Phase Change RAM) has accelerated.
The resistance change memory has been expected as a memory device that substitutes for an NAND flash memory as a file memory or a DRAM as a work memory.
In recent years, applying the resistance change type memory to a configuration memory of an FPGA (Field Programmable Gate Array) has been also attempted.
As a basic configuration, the FPGA includes a logic block (LB) that realizes arbitrary logic information, a connection block (CB) that performs input/output between the logic block and interconnects, and a switch block (SB) that switches connection of the interconnects. In each block, logic information or interconnect connection information are changed based on a value held in the configuration memory.
The switching of the interconnects in the switch block or the input/output in the connection block is controlled by using, e.g., a multiplexer. This control is executed by reading a selection signal, which is input to the multiplexer, from the configuration memory. The logic information in the logic block realizes a truth table by using a look-up table (LUT), and values associated with the truth table are written into the memory.
An SRAM (Static RAM) has been mainly used as the configuration memory of the FPGA. However, since the SRAM is a volatile memory, written data is lost when no power supply voltage is applied to a chip. The SRAM has a cell size larger than those of other memories, and its circuit area of the entire FPGA is large. Therefore, a nonvolatile memory having a small cell size is demanded as the configuration memory of the FPGA. Furthermore, in the FPGA, improvement in operation characteristics of the FPGA, e.g., a reduction in configuration time is also demanded.